K4A4G085WF-BCTD Samsung 4Gb DDR4 SDRAM

Native timing. At DDR4-2666: 0.750 ≤ tCK < 0.833 ns; CL19 and CWL 14 or 18. tAA is 14.25–18 ns; tRCD and tRP are at least 14.25 ns; tRAS is at least 32 ns and at most 9 × tREFI. tRC is at least 46.25 ns. DLL must be enabled and gear-down disabled. Read DBI uses CL22 and adds 3nCK to the tAA limits. Use only supported CL/CWL combinations and retain the listed conditions for optional down-binning.

Supply conditions. VDDQ must not exceed VDD and must track it; AC parameters are characterized with both rails tied together. The DC-condition bandwidth is limited to 20 MHz. Keep VDD and VDDQ within 300 mV, VREFCA at or below 0.6 × VDDQ (at or below 300 mV while both rails are below 500 mV), and VPP at or above VDD/VDDQ. Absolute-maximum ratings do not define normal operation.

Temperature and refresh. The case temperature is measured at the top center of the package. Above 85 °C and up to 95 °C, double the refresh-command frequency, reducing tREFI to 3.9 µs. For self refresh in this range, use the documented manual extended setting MR2[A7:A6]=10. The temperature grade does not configure the controller automatically.

Bank-group timing. For the x8 device’s 1 KB page at DDR4-2666, tCCD_S is at least 4nCK and tCCD_L is at least max(5nCK, 5 ns). tRRD_S is at least max(4nCK, 3 ns), tRRD_L at least max(4nCK, 4.9 ns), and tFAW at least max(20nCK, 21 ns). tWR is at least 15 ns; tWTR_S is at least max(2nCK, 2.5 ns), while tWTR_L and tRTP are at least max(4nCK, 7.5 ns). Apply the separate CRC/DM additions when both functions are enabled.

Mode changes. DLL-off operation uses an 8–20 ns clock period. At DDR4-2666, DLL lock requires at least 1024nCK; mode-register changes require tMRD of at least 8nCK and tMOD of at least max(24nCK, 15 ns). Gear-down entry uses the separate timing sequence, with 2nCK setup and hold; native speed-bin timings cannot be reused in that mode. Entries marked N/A do not supply a programmable timing limit.

Refresh modes. For 4Gb, tRFC1 / tRFC2 / tRFC4 minima are 260 / 160 / 110 ns. The normal refresh interval is 7.8 µs at 0–85 °C and 3.9 µs above 85 °C through 95 °C. LPASR MR2[A7:A6] encodes normal 00, reduced 01, extended 10 and automatic 11; the extended-temperature operating note requires manual extended mode for self refresh. Its IDD6 can rise by about 10–20%. Exit to commands not requiring a locked DLL needs at least tRFC(min) + 10 ns; locked-DLL commands also require tDLLK.

Manufacturer declaration: Samsung describes this documented device family as lead-free, halogen-free and RoHS compliant. This manufacturer statement does not certify an offered lot or establish a separate REACH declaration.

Manufacturer sources: Samsung 4Gb F-die x8 DDR4 Datasheet · Samsung DDR4 Product Guide