K4A4G085WE-BCRC Samsung 4Gb DDR4 SDRAM

Native timing. At DDR4-2400: 0.833 ≤ tCK < 0.937 ns; CL17 and CWL 12 or 16. tAA is 14.16–18 ns; tRCD and tRP are at least 14.16 ns; tRAS is at least 32 ns and at most 9 × tREFI. tRC is at least 46.16 ns. DLL must be enabled and gear-down disabled. Read DBI uses CL20 and adds 3nCK to the tAA limits. Use only supported CL/CWL combinations and retain the listed conditions for optional down-binning.

Supply conditions. VDDQ must not exceed VDD and must track it; AC parameters are characterized with both rails tied together. The DC-condition bandwidth is limited to 20 MHz. Keep VDD and VDDQ within 300 mV, VREFCA at or below 0.6 × VDDQ (at or below 300 mV while both rails are below 500 mV), and VPP at or above VDD/VDDQ. Absolute-maximum ratings do not define normal operation.

Temperature and refresh. The case temperature is measured at the top center of the package. Above 85 °C and up to 95 °C, double the refresh-command frequency, reducing tREFI to 3.9 µs. For self refresh in this range, use the documented manual extended setting MR2[A7:A6]=10. The temperature grade does not configure the controller automatically.

Manufacturer declaration: Samsung describes this documented device family as lead-free, halogen-free and RoHS compliant. This manufacturer statement does not certify an offered lot or establish a separate REACH declaration.

Manufacturer sources: Samsung 4Gb E-die x4/x8 DDR4 Datasheet · Samsung DDR4 Product Guide